A new version of both box64 and box86 has been released! While the changelog for box86 doesn’t contain much, there are a lot of new improvements, features and fixes for box64. With some speed increase, improved compatibility and a new subproject, box32, there is a lot. But let’s dive into more details on the performances…
Tag: box64
Utilizing RVV and More!
What It Takes to Run The Witcher 3 on RiSC-V
Since the last post about it, the dynarec (dynamic recompiler, a Just-In-Time recompilation of x86 code) changed a lot. It still works in four major steps, but now there are a lot more intermediary steps. So let’s see how it works now! Note: this article will focus on the ARM version of the dynarec on…
Note: this article is pretty technical. Basic understanding of what registers are is a strict minimum required to understand what follows. What is AVX? AVX (and its extension AVX2) are complex x86_64 instruction sets which extends the SSE4 instruction set. It mandates the existence of extensions of the 16 SSE 128-bits-wide XMM registers (called XMM0…
In a previous post, we talked about the mechanism behind library wrapping. In it, I said box86/box64 used some manually written files to correctly call functions. However, there is a big question: how are these files written? To follow this article, you will need at least a basic understanding of function signatures. The basics First,…
After sometime debugging some last issues, the new version of box64 and box86 are out. Most of the work has been done on Box64, with lots of improvments again on Emulation and Library wrapping. The CPU emulate up to SSE 4.2 now (it was only SSE 4.1 before), and it also handle the SHA extension.…
New releases of both box86 and box64 (with a silent re-release of box86 to include a critical fix for steam). While Box86 have seen little change, and was mostly fixes and some refactor to help load ELF file better, Box64 had major code contribution for this release. Box64 Dynarec now support RISC-V! Thanks to github…
Box64 and RISC-V
Box64 and RISC-V, the challenges of wrtting the Dynarec, and benchmarks
This article was initially publised for the FOSDEM 2022 virtual event. The host is gone and I’m (quickly) republishing it here. Box86 performances Like for last year, I will present a series of benchmark to try show the efficiency (or not) of box dynarec. This year, I will benchmark both box86 and box64, to show…